Embedded hardware reference for engineers and makers

NodeMCU v2 Amica (ESP8266) Pinout & Diagram

30-pin interactive pinout

The NodeMCU v2 Amica is the gold standard breadboard-friendly ESP8266 board (0.9" row spacing). Built around the ESP-12E module and Silicon Labs CP2102 USB-to-UART bridge, it delivers 32-bit 80MHz computing with integrated 802.11 b/g/n Wi-Fi.

  • Amica / NodeMCU Team
  • Verified source
  • Updated Sep 2026

Interactive pinout diagram

  • GPIO
  • Power
  • Ground
  • Analog
  • Control
  • Bus
  • Not connected

Tap a row of pins to see it up close

NodeMCU v2 Amica (ESP8266) Pinout Vector DiagramInteractive vector pinout diagram of NodeMCU v2 Amica (ESP8266) (top view) showing pin headers, power rails, components, and hardware interfaces.ESP-12E / ESP8266MODNCP1117 100µFCP2102DCL0CHNCP1117 3.3VRSTFLASHA0RSVRSVSD3 / D12SD2 / D11SD1CMDSD0CLKGND3V3ENRSTGNDVIND0 / GPIO16D1 / GPIO5D2 / GPIO4D3 / GPIO0D4 / GPIO23V3GNDD5 / GPIO14D6 / GPIO12D7 / GPIO13D8 / GPIO15RX / GPIO3TX / GPIO1GND3V3

BOARD SUMMARY

ESP8266EX

NodeMCU v2 Amica (ESP8266)

ESP8266EX

Amica / NodeMCU Team
MCU
ESP8266EX
CPU core
Tensilica Xtensa 32-bit LX106
Clock speed
80 MHz
SRAM
80 KB
Flash
4 MB
GPIO count
13
Logic voltage
3.3 V (not 5 V tolerant)
Form factor
30-pin, USB-to-Serial (Silicon Labs CP2102)

Before you wire

GPIO is not 5 V tolerant

  • Strict 3.3V Logic Limit: The ESP8266EX inputs are NOT 5V tolerant. Directly wiring 5V sensor outputs (e.g. 5V HC-SR04 Echo) will permanently destroy the input buffers.
  • Boot Mode Pins (D3, D4, D8): External pull resistors must never counteract the boot states: D3=HIGH, D4=HIGH, D8=LOW during power-on reset.
  • Avoid SD0–SD3 & CLK/CMD: Using GPIO6–11 causes immediate kernel crashes (Fatal exception / Watchdog reset) as the processor loses access to its firmware flash memory.

QUICK LINKS

Pin table

Showing 30 of 30 pins
NodeMCU v2 Amica (ESP8266) pin table: physical pin, name, GPIO, functions, ADC, touch, default role, flags
PinNameGPIOFunctionsADCDefault roleFlags
1 leftA0—
adc
ADC_CH0GPIOinput_only
2 leftRSV—
nc
—No Connectionmanufacturer_discretionary
3 leftRSV—
nc
—No Connectionmanufacturer_discretionary
4 leftSD3 / D12GPIO10
gpiospi
—GPIOflash_psram_reserved
5 leftSD2 / D11GPIO9
gpiospi
—GPIOflash_psram_reserved
6 leftSD1—
spi
—GPIOflash_psram_reserved
7 leftCMD—
spi
—GPIOflash_psram_reserved
8 leftSD0—
spi
—GPIOflash_psram_reserved
9 leftCLK—
spi
—GPIOflash_psram_reserved
10 leftGND—
gnd
—Ground
11 left3V3—
power
—3.3 V Power
12 leftEN—
reset
—Reset / Enableinput_only
13 leftRST—
reset
—Reset / Enable
14 leftGND—
gnd
—Ground
15 leftVIN—
power
—5.0 V Power
1 rightD0 / GPIO16GPIO16
gpiortc
—GPIOonboard_component_shared
2 rightD1 / GPIO5GPIO5
gpioi2cpwm
—GPIO
3 rightD2 / GPIO4GPIO4
gpioi2cpwm
—GPIO
4 rightD3 / GPIO0GPIO0
gpiopwmstrap
—Mode / Strappingboot_strapping
5 rightD4 / GPIO2GPIO2
gpiouartpwmstrap
—Mode / Strappingboot_strapping
6 right3V3—
power
—3.3 V Power
7 rightGND—
gnd
—Ground
8 rightD5 / GPIO14GPIO14
gpiospipwm
—GPIO
9 rightD6 / GPIO12GPIO12
gpiospipwm
—GPIO
10 rightD7 / GPIO13GPIO13
gpiouartspipwm
—GPIO
11 rightD8 / GPIO15GPIO15
gpiouartspipwmstrap
—Mode / Strappingboot_strapping
12 rightRX / GPIO3GPIO3
gpiouart
—GPIOuart_bridge_connected
13 rightTX / GPIO1GPIO1
gpiouart
—GPIOuart_bridge_connected
14 rightGND—
gnd
—Ground
15 right3V3—
power
—3.3 V Power

Grounded reference

Board overview

The NodeMCU v2 Amica is an open-source IoT development board designed by the NodeMCU team. Measuring 48.5 x 25.4 mm, its 0.9" header width leaves one free tie-point column on each side of a standard solderless breadboard, solving the breadboard incompatibility of wider v3 boards.

Power inputs

  • Micro-USB 5V input routed through protection diode D1 to the NCP1117 / AMS1117 LDO regulator.
  • VIN pin (5V to 10V DC external input stepped down to 3.3V by the onboard LDO).
  • 3V3 pins (regulated 3.3V DC rail, up to 800mA peak capacity shared between the ESP8266 Wi-Fi transmitter and external sensors).

Hardware Variants, Clones & Traps

  • Breadboard Compatibility (0.9" Pitch): Unlike the bulky 1.1" NodeMCU v3 LoLin, the v2 Amica fits standard breadboards while preserving one accessible row of connection holes on each side.
  • Internal SPI Flash Header (GPIO6–GPIO11): Pins SD3, SD2, SD1, CMD, SD0, CLK are directly bonded to the 4MB SPI Flash chip inside the ESP-12E module. Never attach external peripherals to these pins.
  • Silicon Labs CP2102 Bridge: Equipped with high-reliability CP2102 USB-to-UART controller with automatic DTR/RTS hardware reset timing for seamless sketch uploading in Arduino IDE and PlatformIO.

Before you wire

  • Strict 3.3V Logic Limit: The ESP8266EX inputs are NOT 5V tolerant. Directly wiring 5V sensor outputs (e.g. 5V HC-SR04 Echo) will permanently destroy the input buffers.
  • Boot Mode Pins (D3, D4, D8): External pull resistors must never counteract the boot states: D3=HIGH, D4=HIGH, D8=LOW during power-on reset.
  • Avoid SD0–SD3 & CLK/CMD: Using GPIO6–11 causes immediate kernel crashes (Fatal exception / Watchdog reset) as the processor loses access to its firmware flash memory.

Specifications

MCU
ESP8266EX
CPU core
Tensilica Xtensa 32-bit LX106
Clock
80 MHz
SRAM
80 KB
Flash
4 MB
Wireless
Wi-Fi 802.11 b/g/n (2.4 GHz)
GPIO count
13
Logic voltage
3.3 V
Operating voltage (VIN)
4.75 - 10 V

Safe GPIO pins

Safe uncomplicated general-purpose I/O choices include D1 (GPIO5) and D2 (GPIO4) which also provide hardware I2C (SCL/SDA). D5 (GPIO14), D6 (GPIO12) and D7 (GPIO13) are ideal for SPI or PWM. Note that all pins operate strictly at 3.3V logic (NOT 5V tolerant).

ADC and analog pins

The A0 pin accepts analog inputs from 0 to 3.3V thanks to an onboard 220k/100k voltage divider that scales the voltage down to the internal 0–1.0V ADC TOUT range of the ESP8266EX.

I2C, SPI and UART pins

Default hardware I2C uses D1 (SCL, GPIO5) and D2 (SDA, GPIO4). Hardware HSPI uses D5 (SCLK, GPIO14), D6 (MISO, GPIO12), D7 (MOSI, GPIO13) and D8 (CS, GPIO15). Primary UART0 is routed to RX (GPIO3) and TX (GPIO1) via the CP2102 bridge.

Strapping and boot pins

Three boot strapping pins must be kept at specific logic levels during reset: D3 (GPIO0) must be HIGH for normal flash execution (LOW triggers UART download mode); D4 (GPIO2) must be HIGH; D8 (GPIO15) must be held LOW (has internal 12k pulldown).

Input-only pins

D0 (GPIO16) has special hardware constraints: it lacks hardware interrupts, PWM and I2C capability. To use Deep Sleep mode, connect D0 to RST so the internal RTC timer can pull RST low to wake the processor.

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