[{"data":1,"prerenderedAt":110},["ShallowReactive",2],{"connector:arm-jtag-20:en":3},{"connector":4,"prose":105,"confirmations":109},{"schemaVersion":5,"governance":6,"meta":18,"pins":36},"1.0.0",{"publication":7,"verification":10,"provenance":15},{"status":8,"publishedDate":9},"published","2026-09-26",{"status":11,"verifiedDate":9,"verifiedBy":12,"checklist":13},"verified","Claude (LLM review against cited primary sources)",{"schema":14,"technicalFacts":14,"relationships":14,"sources":14},true,{"sourceUrls":16},[17],"https:\u002F\u002Fdocumentation-service.arm.com\u002Fstatic\u002F6347d0bdda191e7fe0580562",{"slug":19,"name":20,"title":21,"standard":22,"positionCount":23,"layout":24,"category":25,"source":26,"specs":32,"overview":34},"arm-jtag-20","Standard ARM 20-Pin JTAG Header","Standard ARM 20-Pin 0.1-inch JTAG & SWD Debug Header Pinout","Arm JTAG 20 (IEEE 1149.1 \u002F SWD)",20,"dual-row","debug_swd",[27],{"label":28,"url":17,"authority":29,"documentType":30,"publisher":31},"Arm DSTREAM-PT System and Interface Design Reference Guide, Issue 03 (101714_1.0_03_en)","primary","manufacturer_documentation","Arm",{"standard":33,"positions":23},"ARM 20-Pin 2.54mm Pitch",{"summaryKey":35},"connectors.arm20.summary",[37,42,48,53,58,62,64,68,70,74,76,80,82,86,88,92,94,98,100,104],{"n":38,"category":39,"signal":40,"role":41,"standardized":14},1,"power","VTREF","Target reference voltage: the probe matches its logic levels to it and detects the target when it exceeds 0.8 V",{"n":43,"category":44,"signal":45,"role":46,"standardized":47},2,"nc","NC","Not connected in the Arm pinout",false,{"n":49,"category":50,"signal":51,"role":52,"standardized":14},3,"jtag","nTRST","JTAG Test Reset (active low)",{"n":54,"category":55,"signal":56,"role":57,"standardized":14},4,"gnd","GND","Ground",{"n":59,"category":50,"signal":60,"role":61,"standardized":14},5,"TDI","JTAG Test Data In",{"n":63,"category":55,"signal":56,"role":57,"standardized":14},6,{"n":65,"category":50,"signal":66,"role":67,"standardized":14},7,"TMS \u002F SWDIO","JTAG Test Mode Select \u002F SWD Data I\u002FO",{"n":69,"category":55,"signal":56,"role":57,"standardized":14},8,{"n":71,"category":50,"signal":72,"role":73,"standardized":14},9,"TCK \u002F SWCLK","JTAG Test Clock \u002F SWD Clock",{"n":75,"category":55,"signal":56,"role":57,"standardized":14},10,{"n":77,"category":50,"signal":78,"role":79,"standardized":14},11,"RTCK","Returned Test Clock (adaptive clocking)",{"n":81,"category":55,"signal":56,"role":57,"standardized":14},12,{"n":83,"category":50,"signal":84,"role":85,"standardized":14},13,"TDO \u002F SWO","JTAG Test Data Out \u002F Serial Wire Output",{"n":87,"category":55,"signal":56,"role":57,"standardized":14},14,{"n":89,"category":50,"signal":90,"role":91,"standardized":14},15,"nSRST","System Reset (active low)",{"n":93,"category":55,"signal":56,"role":57,"standardized":14},16,{"n":95,"category":50,"signal":96,"role":97,"standardized":47},17,"DBGRQ","Debug Request (optional)",{"n":99,"category":55,"signal":56,"role":57,"standardized":14},18,{"n":101,"category":50,"signal":102,"role":103,"standardized":47},19,"DBGACK","Debug Acknowledge (optional)",{"n":23,"category":55,"signal":56,"role":57,"standardized":14},{"description":106,"card":107,"intro":108},"Standard ARM 20-pin JTAG header pinout on a 2.54 mm pitch: VTREF, nTRST, TDI, TMS\u002FSWDIO, TCK\u002FSWCLK, RTCK, TDO\u002FSWO, nSRST and grounds, per Arm documentation.","Standard 20-pin, 2.54 mm ARM JTAG and SWD debug header.","The 20-pin ARM JTAG header is the classic 0.1-inch debug connector used by JTAG and Serial Wire Debug probes. Select a contact to see its signal and role.",null,1791663948292]